View STEVAL-IME009V1_8289532.PDF datasheet online --- IC-ON-LINE

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for further information contact your local stmicroelectronics sales office. august 2014 docid026792 rev 1 1/12 STEVAL-IME009V1 evaluation board based on th e sthv800 high voltage pulser data brief features ? 8-channel outputs: high voltage and low voltage bnc connectors ? load simulator using signal equivalent circuits ? possibility to set up own load simulator ? 16 preset waveforms ? usb connector to connect stm32 with pc and supply power to it ? 4 mb serial flash memory to host fpga code and waveforms ? memory expansion connector to add external serial flash ? connectors to supply high voltage and low voltage to the sthv800 output stage ? leds to monitor the power management stage ? human machine interface to select, start and stop the generation of the preset waveforms ? 25 leds to monitor board behavior ? rohs compliant description the STEVAL-IME009V1 is a product evaluation board designed around the sthv800 8-channel high voltage pulser, a st ate-of-the-art device designed for ultrasound imaging applications. the output waveforms can be displayed directly on an oscilloscope by connecting the scope probe to the relative bncs. 16 preset waveforms are available to test the hv pulser under varying conditions. www.st.com
schematic diagrams STEVAL-IME009V1 2/12 docid026792 rev 1 1 schematic diagrams figure 1. STEVAL-IME009V1 ci rcuit schematic (1 of 9) dataout0 dataout1 dataout2 dataout3 dataout4 dataout5 dataout6 dataout7 dataout8 dataout9 dataout10 dataout11 dataout12 dataout[0:15] mcu_fpga_gpio[0:7] dataout13 dataout14 dataout15 dvdd vddp hvp0 hvpcw hvmcw hvm0 vddm dvdd vddp vddm hvp0 hvm0 hvpcw hvmcw fpga_blk fpga thsd_en fpga_spi_cclk fpga_spi_mosi fpga_spi_miso1 fpga_spi_miso2 fpga_spi_miso3 fpga_spi_sel +vfpga_core_1v2 +vfpga_io_3v3 dataout[0:15] cw ck mcu_fpga_gpio[0:7] mcu_fpga_prog mcu_fpga_init_b mcu_fpga_mode1 fpga_mcu_done mcu_fpga_osc_en fpga_mcu_awake mcu_fpga_suspend board_power_blk board_power hvp0 dvdd vddp vddm hvm0 +vfpga_core_1v2 +vfpga_io_3v3 flash_3v3 usb_disconnect usb_dm usb_dp mcu_3v3 hvpcw hvmcw stm32_flash_blk stm32_flash flash_c flash_dq0 flash_ns flash_dq2 flash_dq3 flash_dq1 usb_disconnect usb_dm usb_dp mcu_fpga_prog mcu_fpga_init_b mcu_fpga_mode1 fpga_mcu_done mcu_fpga_osc_en fpga_mcu_awake mcu_fpga_suspend flash_3v3 mcu_3v3 fpga_gpio[0:7] sthv800_blk sthv800 dvdd vddp vddm in1_0 in1_1 in4_0 in3_1 in5_0 in4_1 in6_0 in5_1 in7_0 in6_1 cw in8_0 in7_1 thsd_en in8_1 ck in2_0 in3_0 in2_1 hvm_cw hvm hvp_cw hvp gspg01082014di1330
docid026792 rev 1 3/12 STEVAL-IME009V1 schematic diagrams 12 figure 2. STEVAL-IME009V1 circuit schematic (2 of 9) sot23-5l c7 details: digikey (445-4998-2-nd) - tdk (c1005x5r0j105k) package 0402 3.3v power management usb c8 details: digikey (478-2552-2-nd) - avx (tacl225m006xta) package 0603 sott323-6l rs (515-1995) molex (54819-0572) sthv800 power management j1 details rs (193-0570) phoenix contact (mfg code mkds 1.5/3-5.08) j3 details: rs (193-0570) phoenix contact (mfg code mkds 1.5/3-5.08) mkds 1.5/2-5.08) j2 details rs 2x(193-0564) phoenix contact (mfg code j4 details phoenix contact (mfg code mpt 0.5/2-2.54) rs (220-4260) c12 and c13 detail tdk (c1608x5r0j475k) - digikey (445-5178-2-nd) dimension 0603 - eia 1608 c14 detail tdk (c2012x7r1a106k) - digikey (445-6857-2-nd) dimension 0805 - eia 2012 l1 detail tdk (vlf4012at-2r2m1r5) - rs (614-3147) c1, c2, c9, c10 details: digikey (445-5217-2-nd) - tdk (ckg57nx7s2a226m) package 6.5mm x 5.5 mm c4, c5, c6 details: digikey (445-1436-2-nd) - tdk (c3225x5r1c226m) package 1210 - eia 3225 kingbright kp2012surc rs: 466-3829 farnell: 8529930 led 0805 not assembly mcu usb on fpga hvpcw hvp0 gnd 3v3 connector 3v3 dvdd sw1 details: sw1 rs 711-8329 knitter-switch (mms228t) vddp gnd vddm hvmcw hvm0 gnd low power - high voltage + high voltage dm dp dp dm usbdp usbdm usb_disconnect hvpcw hvp0 dvdd vddp vddm hvmcw hvm0 usb_disconnect usbdm usbdp usb_3v3 ext_3v3 usb_3v3 hvpcw hvp0 dvdd vddp vddm hvmcw hvm0 mcu_3v3 +vfpga_io_3v3 +vfpga_core_1v2 flash_3v3 usb_disconnect usb_dm usb_dp flash_3v3 usb_5v usb_5v gnd_power gnd_power gnd_power gnd_power ext_3v3 gnd_shield dvdd j1 hvp 1 2 3 0 r2 c9 100v 22000n 100v d27 red c3 4.7nf c8 j4 2.2uf 6.3v 1 2 r90 56r l1 2.2uh c12 4u7 6.3v 0 r123 c2 100v 22000n 100v cn1 1 usb_minib vbus dm 2 dp 3 4 id nc 5 gnd 6 shell 7 shell 8 shell 9 shell d26 red j2 lv 1 2 3 4 c4 16v 22000n 16v mms228t 2 com_1a 7 com_1b 3 on_2a 6 on_2b 1 on_1a 8 on_1b nc 4 nc 5 u3 st1s12xx 4 vin 5 fb/vo en 1 2 gnd sw 3 c13 4u7 6.3v 56 r124 c6 16v 22000n 16v c10 100v 22000n 100v j3 hvm 1 2 3 u1 d1 1 d2 d3 usbuf02w6 grd 2 3 4 5 3.3v d4 6 c5 16v 22000n 16v c14 10u 10v r125 56 j41 1 2 c11 33nf r1 1m c1 100v 22000n 100v c7 1uf d28 red u2 1 vin lds3985m33r 2 gnd 3 inh 4 byps 5 vout d1 sm2t3v3a gspg01082014di1335
schematic diagrams STEVAL-IME009V1 4/12 docid026792 rev 1 figure 3. STEVAL-IME009V1 circuit schematic (3 of 9) jumper j5 is used to control i/o pullups during fpga configuration. diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair open (default) to float i/o output during fpga configuration. set jumper 1:2 to enable i/o pullups during fpga configuration. diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair diff. pair c16 and c17 details: tdk (c2012x7r1a106k) - digikey (445-6857-2-nd) dimension 0805 - eia 2012 jumpers j35, j36 and j37 are used to set dataout output state. configure j35 and j36 to setup outputs idle state as follows: not assembly not assembly not assembly these jumpers hswapen open j37 (default) to connect fpga outputs close j37 to disconnect outputs (high-z) 00 - (j35 and j36 open) --> high-z (default) 01 - (j35 closed and j36 open) --> clamp/hvr_sw 11 - (j35 and j36 closed) --> high-z 10 - (j35 open and j36 closed) --> clamp idle state header 17x2 sthv748 i/o connector fpga disconnect dataout0 dataout1 dataout2 dataout3 dataout4 dataout5 dataout6 dataout7 dataout8 dataout9 dataout10 dataout11 dataout12 dataout13 dataout14 dataout15 dataout[0:15] hswapen ck thsd_en cw dataout11 thsd_en dataout0 dataout2 dataout4 dataout6 dataout8 dataout10 dataout12 dataout14 dataout1 dataout3 dataout5 dataout7 dataout9 dataout13 ck dataout15 cw hi_z idle_state1 idle_state0 thsd_en ck cw dataout[0:15] +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 j5 jumper 1 2 r122 10k 0402 c15 100n 0402 j35 12 c16 10uf 10v 0805 c17 10uf 10v 0805 j37 12 r120 10k 0402 u4a fpga - bank 0 xc6slx16-2csg324c c4 d4 a2 b2 c6 d6 a3 b3 a4 b4 a5 c5 e6 f7 a6 b6 e8 e7 a7 c7 c8 d8 f8 g8 a8 b8 c9 d9 a9 b9 c11 d11 a10 c10 f9 g9 a11 b11 f10 g11 a12 b12 e11 f11 c12 d12 a13 c13 e12 f12 a14 b14 e13 f13 a15 c15 c14 d14 a16 b16 j6 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 r3 10k 0402 c18 100n 0402 r121 10k 0402 j36 12 io_0_l01n_vref io_0_l01p_hswapen io_0_l02n io_0_l02p io_0_l03n io_0_l03p io_0_l04n io_0_l04p io_0_l05n io_0_l05p io_0_l06n io_0_l06p io_0_l07n io_0_l07p io_0_l08n_vref io_0_l08p io_0_l09n io_0_l09p io_0_l10n io_0_l10p io_0_l11n io_0_l11p io_0_l32n io_0_l32p io_0_l33n io_0_l33p io_0_l34n_gclk18 io_0_l34p_gclk19 io_0_l35n_gclk16 io_0_l35p_gclk17 io_0_l36n_gclk14 io_0_l36p_gclk15 io_0_l37n_gclk12 io_0_l37p_gclk13 io_0_l38n_vref io_0_l38p io_0_l39n io_0_l39p io_0_l40n io_0_l40p io_0_l41n io_0_l41p io_0_l42n io_0_l42p io_0_l47n io_0_l47p io_0_l50n io_0_l50p io_0_l51n io_0_l51p io_0_l62n_vref io_0_l62p io_0_l63n_scp6 io_0_l63p_scp7 io_0_l64n_scp4 io_0_l64p_scp5 io_0_l65n_scp2 io_0_l65p_scp3 io_0_l66n_scp0 io_0_l66p_scp1 gspg01082014di1340
docid026792 rev 1 5/12 STEVAL-IME009V1 schematic diagrams 12 figure 4. STEVAL-IME009V1 circuit schematic (4 of 9) sw2, sw3, sw4, details rs (378-6527) place r7 (1%) close to the clock source ds1088lu-66 device pushbuttons peripherral module (pmod) ctrl led green led kingbright kp2012surc rs: 466-3778 farnell: 8529906 led 0805 66mhz external oscillator dx sx backup of u5 not assembly not assembly not assembly near start button c26, c27, c30 and c31 detail tdk (c2012x7r1a106k) - digikey (445-6857-2-nd) dimension 0805 - eia 2012 near stop button idle state signal error signal pmod2 pmod1 program stop start fpga reset idle error two right-angle, 12-pin (2 x 6 female) peripheral module (pmod) headers (j8, j9) are interfaced to the fpga, with each header providing 3.3 v power, ground, and eight i/o's. these headers may be utilized as general-purpose i/os or may be used to interface to pmods. j6 and j8 are placed in close proximity (0'9" -centers) on the pcb in order to support dual pmods. fpga user i/o 66mhz osc when using backup oscillator x1, r126 have to be unmounted and r6 must be placed. red led kingbright kp2012surc rs: 466-3829 farnell: 8529930 led 0805 stop_pb fpga_reset ctrl_led1 ctrl_led0 sel_prog_pb fpga_clk_66mhz start_pb fpga_dout_busy fpga_awake fpga_pmod1_p2 fpga_user_io_10 fpga_user_io_11 fpga_user_io_12 fpga_user_io_13 fpga_user_io_14 fpga_user_io_15 ctrl_led3 ctrl_led2 fpga_pmod1_p4 fpga_pmod1_p1 fpga_pmod1_p3 fpga_pmod1_p7 fpga_pmod1_p8 fpga_pmod1_p10 fpga_pmod1_p9 ctrl_led0 ctrl_led2 ctrl_led1 ctrl_led3 fpga_pmod2_p2 fpga_pmod2_p4 fpga_pmod2_p1 fpga_pmod2_p3 fpga_pmod2_p7 fpga_pmod2_p8 fpga_pmod2_p10 fpga_pmod2_p9 fpga_pmod1_p2 fpga_pmod1_p1 fpga_pmod1_p4 fpga_pmod1_p3 fpga_pmod1_p8 fpga_pmod1_p7 fpga_pmod1_p10 fpga_pmod1_p9 fpga_pmod2_p2 fpga_pmod2_p1 fpga_pmod2_p4 fpga_pmod2_p3 fpga_pmod2_p8 fpga_pmod2_p7 fpga_pmod2_p10 fpga_pmod2_p9 fpga_user_io_0 fpga_user_io_1 fpga_user_io_2 fpga_user_io_3 fpga_user_io_4 fpga_user_io_5 fpga_user_io_6 fpga_user_io_7 fpga_user_io_8 fpga_user_io_9 fpga_clk_66mhz fpga_reset start_pb sel_prog_pb stop_pb fpga_mcu_awake mcu_fpga_osc_en mcu_fpga_osc_en +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 c28 100nf r10 56r 0402 d3 green j9 header 6x2 2 4 6 8 10 12 1 3 5 7 9 11 r12 56r 0402 r9 10k 0402 x1 1 oe st gnd 2 vcc 4 out 3 r5 10k 0402 d4 green c22 100nf r11 56r 0402 sw3 c25 sw pushbutton-dpst 100nf c27 c24 10uf 10v 0805 100nf r8 10k 0402 c29 100nf tp1 1 test point c20 10nf j7 header 16x2 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 c19 100nf r6 10k nm c30 10uf 10v 0805 c21 100nf c32 100nf sw2 r4 sw pushbutton-dpst 10k 0402 d2 green r13 56r 0402 r126 10k u4b fpga - bank 1 xc6slx16-2csg324c f16 f15 c18 c17 g14 f14 d18 d17 g13 h12 e18 e16 k13 k12 f18 f17 h14 h13 h16 h15 g18 g16 k14 j13 l13 l12 k16 k15 l16 l15 h18 h17 j18 j16 k18 k17 l18 l17 m18 m16 n18 n17 p18 p17 n16 n15 t18 t17 u18 u17 n14 m14 m13 l14 p16 p15 r7 33r2 d5 red c31 c23 10uf 10v 0805 100nf c26 10uf 10v 0805 sw4 sw pushbutton-dpst sw5 j8 sw pushbutton-dpst header 6x2 2 4 6 8 10 12 1 3 5 7 9 11 u5 vcc 2 ds1088lu-66 3 vcc 7 n/c 8 n/c 1 out 4 gnd gnd 5 pdn 6 io_1_l01n_a24_vref io_1_l01p_a25 io_1_l29n_a22_m1a14 io_1_l29p_a23_m1a13 io_1_l30n_a20_m1a11 io_1_l30p_a21_m1reset io_1_l31n_a18_m1a12 io_1_l31p_a19_m1cke io_1_l32n_a16_m1a9 io_1_l32p_a17_m1a8 io_1_l33n_a14_m1a4 io_1_l33p_a15_m1a10 io_1_l34n_a12_m1ba2 io_1_l34p_a13_m1we io_1_l35n_a10_m1a2 io_1_l35p_a11_m1a7 io_1_l36n_a8_m1ba1 io_1_l36p_a9_m1ba0 io_1_l37n_a6_m1a1 io_1_l37p_a7_m1a0 io_1_l38n_a4_m1clkn io_1_l38p_a5_m1clk io_1_l39n_m1odt io_1_l39p_m1a3 io_1_l40n_gclk10_m1a6 io_1_l40p_gclk11_m1a5 io_1_l41n_gclk8_m1casn io_1_l41p_gclk9_irdy1_m1rasn io_1_l42n_gclk6_trdy1_m1ldm io_1_l42p_gclk7_m1udm io_1_l43n_gclk4_m1dq5 io_1_l43p_gclk5_m1dq4 io_1_l44n_a2_m1dq7 io_1_l44p_a3_m1dq6 io_1_l45n_a0_m1ldqsn io_1_l45p_a1_m1ldqs io_1_l46n_foe_b_m1dq3 io_1_l46p_fcs_b_m1dq2 io_1_l47n_ldc_m1dq1 io_1_l47p_fwe_b_m1dq0 io_1_l48n_m1dq9 io_1_l48p_hdc_m1dq8 io_1_l49n_m1dq11 io_1_l49p_m1dq10 io_1_l50n_m1udqsn io_1_l50p_m1udqs io_1_l51n_m1dq13 io_1_l51p_m1dq12 io_1_l52n_m1dq15 io_1_l52p_m1dq14 io_1_l53n_vref io_1_l53p io_1_l61n io_1_l61p io_1_l74n_dout_busy io_1_l74p_awake gspg01082014di1345
schematic diagrams STEVAL-IME009V1 6/12 docid026792 rev 1 figure 5. STEVAL-IME009V1 circuit schematic (5 of 9) kingbright kp-3216syc rs: 466-3942 led 0805 spi external programming header spi flash ctrl signals program selector leds place r38 close to the fpga device fpga configuration configuration mode selection: fpga_mode0 = parallel (low) or serial (high) fpga_mode1 = master (low) or slave (high) to correct ext spi flash place d29 close to j10 prog 0 prog 1 prog 2 prog 3 prog 4 c33 details: tdk (c2012x7r1a106k) - digikey (445-6857-2-nd) dimension 0805 - eia 2012 prog 5 prog 6 prog 7 prog 8 prog 9 prog 10 prog 11 prog 12 prog 13 prog 14 prog 15 when fpga_init_b (bidirectional open-drain) is low the configuration memory is being cleared. when held low, the start of configuration is delayed. during configuration, a low on this output indicates that a configuration data error has occurred. prog_led12 prog_led14 prog_led13 prog_led15 prog_led8 prog_led10 prog_led9 prog_led11 prog_led4 prog_led6 prog_led5 prog_led7 prog_led0 prog_led2 prog_led1 prog_led3 mcu_fpga_gpio2 mcu_fpga_gpio3 mcu_fpga_gpio0 mcu_fpga_gpio1 prog_led10 prog_led11 prog_led2 prog_led3 prog_led6 prog_led7 prog_led0 prog_led1 prog_led4 prog_led5 prog_led8 prog_led9 fpga_mode0 cclk fpga_spi_miso1 prog_led14 prog_led15 mcu_fpga_gpio6 mcu_fpga_gpio7 mcu_fpga_gpio4 mcu_fpga_gpio5 prog_led12 prog_led13 fpga_spi_miso2 fpga_spi_mosi fpga_spi_sel fpga_init_b cclk fpga_spi_miso3 fpga_spi_miso1 fpga_spi_mosi fpga_spi_sel fpga_spi_miso2 fpga_mode1 fpga_mode0 fpga_init_b fpga_mode1 mcu_fpga_gpio[0:7] fpga_spi_miso3 mcu_fpga_gpio0 mcu_fpga_gpio1 mcu_fpga_gpio2 mcu_fpga_gpio3 mcu_fpga_gpio4 mcu_fpga_gpio5 mcu_fpga_gpio6 mcu_fpga_gpio7 mcu_fpga_init_b mcu_fpga_mode1 mcu_fpga_gpio[0:7] +vfpga_io_3v3 +vfpga_io_3v3 fpga_spi_cclk fpga_spi_miso1 fpga_spi_mosi fpga_spi_sel fpga_spi_miso2 fpga_spi_miso3 mcu_fpga_prog r24 68r 0402 d13 yellow d29 green d11 yellow d14 yellow r22 2k43 0402 u4c fpga - bank 2 xc6slx16-2csg324c t15 r15 v16 u16 t13 r13 v15 u15 v14 t14 p12 n12 v13 u13 n11 m11 t11 r11 v12 t12 p11 n10 n9 m10 v11 u11 t10 r10 v10 u10 t8 r8 v9 t9 n8 m8 v8 u8 v7 u7 p8 n7 v6 t6 t7 r7 p7 n6 t5 r5 v5 u5 t3 r3 v4 t4 p6 n5 v3 u3 56 r127 r15 68r 0402 r19 68r 0402 r31 68r 0402 r38 33r2 0402 d15 yellow d18 yellow r34 68r 0402 r27 68r 0402 tp2 1 test point d6 yellow d21 yellow d12 yellow r23 68r 0402 d10 yellow r21 r18 2k43 0402 dnp j10 2k43 0402 dnp con10 10 1 2 3 4 5 6 7 8 9 r14 68r 0402 c34 100nf r28 68r 0402 r17 2k43 0402 d17 yellow r33 68r 0402 d20 yellow r32 68r 0402 d19 yellow r16 10k 0402 r30 68r 0402 r39 na 0402 d9 yellow c33 r25 10uf 10v 0805 68r 0402 d16 yellow r40 na 0402 r20 68r 0402 r26 68r 0402 r29 68r 0402 d7 yellow d8 io_2_l01n_m0_cmpmiso io_2_l01p_cclk io_2_l02n_cmpmosi io_2_l02p_cmpclk io_2_l03n_mosi_csi_b_miso0 io_2_l03p_d0_din_miso_miso1 io_2_l05n io_2_l05p io_2_l12n_d2_miso3 io_2_l12p_d1_miso2 io_2_l13n_d10 io_2_l13p_m1 io_2_l14n_d12 io_2_l14p_d11 io_2_l15n io_2_l15p io_2_l16n_vref io_2_l16p io_2_l19n io_2_l19p io_2_l20n io_2_l20p io_2_l22n io_2_l22p io_2_l23n io_2_l23p io_2_l29n_gclk2 io_2_l29p_gclk3 io_2_l30n_gc lk0_usercclk io_2_l30p_gclk1_d13 io_2_l31n_gclk30_d15 io_2_l31p_gclk31_d14 io_2_l32n_gclk28 io_2_l32p_gclk29 io_2_l40n io_2_l40p io_2_l41n_vref io_2_l41p io_2_l43n io_2_l43p io_2_l44n io_2_l44p io_2_l45n io_2_l45p io_2_l46n io_2_l46p io_2_l47n io_2_l47p io_2_l48n_rdwr_b_vref io_2_l48p_d7 io_2_l49n_d4 io_2_l49p_d3 io_2_l62n_d6 io_2_l62p_d5 io_2_l63n io_2_l63p io_2_l64n_d9 io_2_l64p_d8 io_2_l65n_cso_b io_2_l65p_init_b yellow gspg01082014di1350
docid026792 rev 1 7/12 STEVAL-IME009V1 schematic diagrams 12 figure 6. STEVAL-IME009V1 circuit schematic (6 of 9) fpga bank 3 not used u4d fpga - bank 3 xc6slx16-2csg324c n3 n4 p3 p4 m5 l6 u1 u2 t1 t2 p1 p2 n1 n2 m1 m3 l1 l2 k1 k2 l3 l4 j1 j3 h1 h2 k3 k4 k5 l5 h3 h4 k6 l7 g1 g3 j6 j7 f1 f2 h5 h6 e1 e3 f3 f4 d1 d2 g6 h7 d3 e4 f5 f6 c1 c2 io_3_l01n_vref io_3_l01p io_3_l02n io_3_l02p io_3_l31n_vref io_3_l31p io_3_l32n_m3dq15 io_3_l32p_m3dq14 io_3_l33n_m3dq13 io_3_l33p_m3dq12 io_3_l34n_m3udqsn io_3_l34p_m3udqs io_3_l35n_m3dq11 io_3_l35p_m3dq10 io_3_l36n_m3dq9 io_3_l36p_m3dq8 io_3_l37n_m3dq1 io_3_l37p_m3dq0 io_3_l38n_m3dq3 io_3_l38p_m3dq2 io_3_l39n_m3ldqsn io_3_l39p_m3ldqs io_3_l40n_m3dq7 io_3_l40p_m3dq6 io_3_l41n_gclk26_m3dq5 io_3_l41p_gclk27_m3dq4 io_3_l42n_gclk24_m3ldm io_3_l42p_gclk25_trdy2_m3udm io_3_l43n_gclk22_irdy2_m3casn io_3_l43p_gclk23_m3rasn io_3_l44n_gclk20_m3a6 io_3_l44p_gclk21_m3a5 io_3_l45n_m3odt io_3_l45p_m3a3 io_3_l46n_m3clkn io_3_l46p_m3clk io_3_l47n_m3a1 io_3_l47p_m3a0 io_3_l48n_m3ba1 io_3_l48p_m3ba0 io_3_l49n_m3a2 io_3_l49p_m3a7 io_3_l50n_m3ba2 io_3_l50p_m3we io_3_l51n_m3a4 io_3_l51p_m3a10 io_3_l52n_m3a9 io_3_l52p_m3a8 io_3_l53n_m3a12 io_3_l53p_m3cke io_3_l54n_m3a11 io_3_l54p_m3reset io_3_l55n_m3a14 io_3_l55p_m3a13 io_3_l83n_vref io_3_l83p gspg01082014di1355
schematic diagrams STEVAL-IME009V1 8/12 docid026792 rev 1 figure 7. steval-ime0089v1 circuit schematic (7 of 9) fpga bank 3 not used done program_b jumper j12 1:2 to force fpga into suspend mode. 2:3 (default) to allow mcu to control mode. fpga suspend fpga jtag jumper j13 used to prevent fpga from programming from configuration source. set 1:2 to disable fpga programming. open (default) to enable fpga programming. 4-resistor array 3.2x1.6mm not assembly 0805 suspend & cmpcs_b con14a xilinx parallel iv connector 2.0mm 7x2 shrouded header c35, c40, c51, c58, c66 details murata (grm31cr60j107me39l) - digikey (490-4539-1-ndt ) dimension 1206 - eia 3216 to be placed near u3 to be placed near u6 resdip4x1206 not assembly not assembly suspend fpga prog disable done fpga jtag fpga prog c36, c37, c38, c41, c42, c52, c53, c59, c60, c67, c68 details dk (c1608x5r0j475k) - digikey (445-5178-2-nd) dimension 0603 - eia 1608 xc6slx16-3csg324c not assembly not assembly not assembly not assembly fpga_prog fpga_done fpga_prog fpga_suspend fpga_done fpga_cmp_cs_b fpga_tdi fpga_tms fpga_tck +vfpga_io_3v3 +vfpga_core_1v2 fpga_tdo mcu_fpga_prog fpga_mcu_done mcu_fpga_suspend +vfpga_io_3v3 +vfpga_core_1v2 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_core_1v2 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 +vfpga_io_3v3 c36 r50 4.7uf 6.3v 0603 10k 0402 c35 r49 100uf 6.3v 1206 10k 0402 c62 100nf c64 c38 0.22uf 6.3v 0402 c63 4.7uf 6.3v 0603 c56 0.22uf 6.3v 0402 r51 56r 0.22uf 6.3v 0402 r48 10k 0402 c60 r52 4.7uf 6.3v 0603 330 0402 c61 0.22uf 6.3v 0402 r44 49r 0402 c59 c55 4.7uf 6.3v 0603 c45 0.22uf 6.3v 0402 0.22uf 6.3v 0402 d23 green c54 j12 0.22uf 6.3v 0402 header 3 1 2 3 c58 c48 100uf 6.3v 1206 0 r47 0.22uf 6.3v 0402 c53 c69 4.7uf 6.3v 0603 c42 0.22uf 6.3v 0402 c52 4.7uf 6.3v 0603 c43 4.7uf 6.3v 0603 c47 0.22uf 6.3v 0402 c41 0.22uf 6.3v 0402 j13 4.7uf 6.3v 0603 jumper 1 2 u6 1 74v1g32ctr 2 4 5 3 c51 100uf 6.3v 1206 q1 2n7002 c71 r45 0.22uf 6.3v 0402 10k 0402 j11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 c70 0.22uf 6.3v 0402 rst1 rs (378-6527) sw pushbutton-dpst fpga - power & configuration tck a17 u4e xc6slx16-2csg324c tms b18 tdo d16 tdi d15 v2 program_b_2 r16 suspend done_2 v17 p13 cmpcs_b_2 vcco_0 b10 vcco_0 b15 b5 vcco_0 vcco_0 d13 d7 vcco_0 vcco_0 e10 vcco_1 e17 vcco_1 g15 vcco_1 j14 vcco_1 j17 vcco_1 m15 vcco_1 r17 p9 vcco_2 vcco_2 r12 r6 vcco_2 vcco_2 u14 u4 vcco_2 u9 vcco_2 e2 vcco_3 g4 vcco_3 j2 vcco_3 j5 vcco_3 m4 vcco_3 r2 vcco_3 b1 vccaux vccaux b17 vccaux e14 e5 vccaux e9 vccaux vccaux g10 vccaux j12 k7 vccaux m9 vccaux vccaux p10 vccaux p14 p5 vccaux g7 vccint vccint h11 h9 vccint vccint j10 j8 vccint vccint k11 k9 vccint vccint l10 l8 vccint vccint m12 m7 vccint gnd a18 gnd b13 gnd c3 gnd d10 gnd d5 gnd b7 gnd c16 gnd g17 gnd g2 gnd g5 gnd h10 gnd h8 gnd j11 gnd j15 gnd j4 gnd e15 gnd g12 gnd k8 gnd l11 gnd l9 gnd m17 gnd m2 gnd m6 gnd n13 gnd r1 gnd r14 gnd r18 gnd r4 gnd r9 gnd t16 gnd u12 gnd u6 gnd v1 gnd v18 gnd k10 gnd j9 gnd a1 c40 c68 100uf 6.3v 1206 c72 4.7uf 6.3v 0603 c67 0.22uf 6.3v 0402 r46 4.7uf 6.3v 0603 10k 0402 c66 c73 100uf 6.3v 1206 100nf u7 4 2 74lx1g08ctr 1 5 3 rn1 resistor dip 4 1 2 3 4 8 7 6 5 c65 c49 0.22uf 6.3v 0402 0.22uf 6.3v 0402 r41 49r 0402 r42 49r 0402 r43 49r 0402 c57 c46 0.22uf 6.3v 0402 c44 0.22uf 6.3v 0402 c37 0.22uf 6.3v 0402 d22 4.7uf 6.3v 0603 stth102a c39 c50 0.22uf 6.3v 0402 0.22uf 6.3v 0402 gspg01082014di1400
docid026792 rev 1 9/12 STEVAL-IME009V1 schematic diagrams 12 figure 8. STEVAL-IME009V1 circuit schematic (8 of 9) c77, c80, c111, c112 details digikey (490-1462-2-nd) murata (grm188r72a271ka01d) j16, j17, j22, j23, j25, j26, j29 and j30 details tyco electronics (1-1337482-0) - rs (420-5401) sthv800 thsd lvout_5 lvout_6 xdcr_1 thsd j16, j17, j22, j23, j25, j26, j29 and j30 details tyco electronics (1-1337482-0) - rs (420-5401) xdcr_2 xdcr_3 xdcr_4 xdcr_5 xdcr_6 xdcr_7 xdcr_8 d1, d2, d3 ,d4, d5, d6, d7, d8 diode dfls1200 rs-code 708-2324 lvout_1 lvout_7 lvout_8 lvout_2 lvout_3 ck lvout_4 in1_0 in1_0 in1_1 in2_0 in1_1 in2_0 in2_1 in3_0 in3_1 in4_0 in4_1 hvp hvp_cw dvdd vddp vddm hvm hvm_cw thsd_en dvdd thsd_en in2_2 in3_0 in3_1 in4_0 in4_1 in8_1 in8_0 in7_1 in7_0 in6_1 in6_0 in5_1 in5_0 in5_0 in5_1 in6_0 in6_1 in7_0 in7_1 in8_0 in8_1 cw ck cw hvm hvm_cw hvp hvm hvp hvp hvm ck hvp vddm vddp dvdd hvp hvm hvp_cw dvdd vddp vddm ck thsd_en in1_0 in1_1 cw in2_0 in2_1 in3_0 in3_1 in4_0 in4_1 in5_0 in5_1 in6_0 in6_1 in7_0 in7_1 in8_0 in8_1 hvp hvp_cw hvm hvm_cw c84 270p 100v 1206 b2s j17 1 2 c83 220n cx9 220n 100v 0805 b2s j29 1 2 c76 20p 1206 d34 dfls1200 d33 dfls1200 jlch6 bnc 1 2 cx3 c90 220n 100v 0805 220n r54 100 c85 220n r62 100 u8 sthv800 1 xdcr_1 2 xdcr_2 3 xdcr_3 4 xdcr_4 hvm 5 6 hvm hvm 7 hvm 8 9 hvm 10 hvm_cw 11 xdcr_5 12 xdcr_6 13 xdcr_7 14 xdcr_8 15 gnd_pwr 16 lvout_5 17 lvout_6 18 lvout_7 19 lvout_8 20 gnd_pwr 21 in5_0 22 in5_1 23 in6_0 24 in6_1 25 in7_0 26 in7_1 27 in8_0 in8_1 28 thsd 29 vddp 30 vddm 31 agnd 32 hvp 33 dgnd 39 dvdd 40 cw 41 ck 42 43 in1_0 in1_1 44 in2_0 45 in2_1 46 47 in3_0 48 in3_1 38 hvp_cw 49 in4_0 in4_1 50 51 gnd_pwr 52 lvout_1 53 lvout_2 54 lvout_3 55 lvout_4 56 gnd_pwr hvp 34 hvp 35 hvp 36 hvp 37 r55 100 cx4 jlch8 bnc 1 2 220n 100v 0805 220n 100v 0805 j27 b2s 1 2 jch7 bnc 1 2 tp3 1 test point b2s j34 1 2 d40 dfls1200 r63 100 c80 d42 270p 100v 1206 dfls1200 c91 220n c116 270p 100v 1206 jch6 bnc 1 2 220n 100v 0805 c75 20p 1206 j31 b2s 1 2 d37 dfls1200 jlch4 bnc 1 2 jch3 bnc 1 2 d44 dfls1200 c97 220n jlch3 bnc 1 2 c118 20p 1206 d31 dfls1200 d46 dfls1200 d38 dfls1200 b2s j16 1 2 jlch2 bnc 1 2 cx7 cx6 220n 100v 0805 220n 100v 0805 jlch5 bnc 1 2 cx10 220n 100v 0805 b2s j30 1 2 b2s j15 1 2 r56 c92 20p 1206 100 c87 220n d36 dfls1200 jlch7 bnc 1 2 cx1 cx2 j28 220n 100v 0805 b2s 1 2 c81 d35 270p 100v 1206 dfls1200 j25 con3 1 2 3 cx5 c86 220n r59 100k c114 20p 1206 d39 dfls1200 j20 b2s 1 2 c111 r58 10k 270p 100v 1206 r64 100 d41 dfls1200 c113 d32 270p 100v 1206 dfls1200 jch8 bnc 1 2 c89 220n c77 r65 270p 100v 1206 100 jlch1 bnc 1 2 jch1 bnc 1 2 r61 100 jch5 bnc 1 2 cx8 220n 100v 0805 b2s j14 1 2 c115 20p 1206 c112 270p 100v 1206 c101 220n jch2 bnc 1 2 j32 b2s 1 2 c74 20p 1206 c95 220n j21 b2s 1 2 d43 dfls1200 j18 b2s 1 2 1 j33 b2s 2 j24 c117 20p 1206 con3 1 2 3 c88 220n j19 b2s 1 2 jch4 bnc 1 2 d45 dfls1200 gspg01082014di1405
schematic diagrams STEVAL-IME009V1 10/12 docid026792 rev 1 figure 9. steval-ime0089v1 circuit schematic (9 of 9) not assembly rs (505-9186) c&k (y78b22110fp) jtag/swd red kingbright kp2012surc rs: 466-3829 farnell: 8529930 led 0805 male connector 2x5 pitch 1.27 mm samtec ftsh-105-01-f-d-k red kingbright kp2012surc rs: 466-3829 farnell: 8529930 led 0805 oscillator mcu place near mcu optional fpga i/o spi flash murata (cstce8m00g55-r0) digikey (490-1195-1-nd) rs: 283-961 farnell: 1615352 optional fpga configuration signals int spi flash flash disable mcu reset 8mhz osc download use j38 to enable/disable power for spi flash device. j38 must be open when using external spi flash device on connecto j10. default value closed. c123 details: digikey (445-4998-2-nd) - tdk (c1005x5r0j105k) package 0402 flash ready mcu jtag stm32f103 reset# user_led1 jntrst jtdo jtms jtdi jtck reset# user_led1 user_led2 user_led2 oscout oscin boot0 boot1 oscin flash_ns flash_c flash_dq1 flash_dq0 jtms jtck jtdi jtdo jntrst reset# oscout flash_dq0 flash_dq1 fpga_gpio0 fpga_gpio1 fpga_gpio2 fpga_gpio3 fpga_gpio4 fpga_gpio5 fpga_gpio6 fpga_gpio7 stm32_gpio_0 stm32_gpio_1 stm32_gpio_2 stm32_gpio_3 stm32_gpio_4 stm32_gpio_5 stm32_gpio_6 stm32_gpio_7 fpga_gpio[0:7] stm32_gpio_10 stm32_gpio_11 stm32_gpio_12 stm32_gpio_13 stm32_gpio_14 stm32_gpio_0 stm32_gpio_1 stm32_gpio_2 stm32_gpio_3 stm32_gpio_4 stm32_gpio_5 stm32_gpio_6 stm32_gpio_7 stm32_gpio_8 stm32_gpio_9 stm32_gpio_8 stm32_gpio_9 stm32_gpio_10 stm32_gpio_11 stm32_gpio_12 fpga_mcu_awake fpga_mcu_done mcu_fpga_osc_en mcu_fpga_init_b mcu_fpga_mode1 mcu_fpga_prog mcu_fpga_suspend stm32_gpio_13 stm32_gpio_14 vdda mcu_3v3 usb_disconnect dm_stm32 dp_stm32 flash_3v3 flash_dq2 flash_dq3 flash_c flash_ns flash_dq2 flash_dq3 flash_c flash_dq0 flash_ns flash_dq2 flash_dq3 flash_dq1 fpga_gpio[0:7] fpga_mcu_awake fpga_mcu_done usb_disconnect mcu_fpga_osc_en mcu_fpga_init_b mcu_fpga_mode1 mcu_fpga_prog mcu_fpga_suspend usb_dm usb_dp mcu_3v3 flash_3v3 mcu_3v3 mcu_3v3 mcu_3v3 mcu_3v3 mcu_3v3 flash_3v3 mcu_3v3 r66 4k7 rst2 j38 2 1 sw pushbutton-dpst d30 red 56 r128 c124 100nf c123 1uf 6.3v c122 100nf u10 1 vbat stm32f103c8t6 2 3 4 pc14-osc32_in pc15-osc32_out pc13-tamper-rtc 5 pd0 osc_in 6 7 pd1 osc_out nrst 8 vssa 9 vdda 10 pa0-wkup pa1 11 pa2 12 pa3 13 pa4 14 pa5 15 pa6 16 pa7 17 pb0 18 pb1 19 20 pb2-boot1 pb10 21 pb11 22 vss_1 23 24 vdd_1 pb12 25 pb13 26 pb14 27 pb15 28 pa8 29 pa9 30 pa10 31 pa11 32 pa12 33 34 pa13 jtms vss_2 35 36 vdd_2 pa14 jtck pa15 jtdi 37 pb3 jtdo 38 pb4 jntrst 39 40 pb5 41 pb6 42 pb7 43 boot0 44 pb8 45 pb9 46 47 vss_3 vdd_3 48 r80 0r - n/a y1 8mhz r131 4k7 d24 r79 10k u9 vcc 8 n25q032xsc 5 dq0 4 vss c 6 ns 1 3 nw/vpp/dq2 7 nhold/dq3 dq1 2 r75 0r - n/a c121 100nf r74 0r - n/a r73 0r - n/a r132 0r - n/a r81 56r r77 10k r72 0r - n/a d25 r89 0r - n/a 1 jp1 jumper 2 r76 10k r71 0r - n/a r88 0r - n/a r86 0r - n/a r70 0r - n/a r85 0r - n/a r130 4k7 r78 10k r69 0r - n/a c126 100nf r84 0r - n/a c119 100nf r133 10k r87 10k r68 56r c120 100nf j40 1 2 swd/jtag 3 4 5 6 7 8 9 10 r129 4k7 r83 0r - n/a r67 4k7 c125 100nf r82 0r - n/a gspg01082014di1410
docid026792 rev 1 11/12 STEVAL-IME009V1 revision history 12 2 revision history table 1. document revision history date revision changes 07-aug-2014 1 initial release.
STEVAL-IME009V1 12/12 docid026792 rev 1 important notice ? please read carefully stmicroelectronics nv and its subsidiaries (?st?) reserve the right to make changes, corrections, enhancements, modifications, and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant in formation on st products before placing orders. st products are sold pursuant to st?s terms and conditions of sale in place at the time of o rder acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers? products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2014 stmicroelectronics ? all rights reserved

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